47 search results - page 2 / 10 » Strategies for Branch Target Buffers |
ASPLOS
2009
ACM
14 years 6 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
CDES
2006
13 years 6 months ago
2006
Recently, several loop buffer designs have been proposed to reduce instruction fetch energy due to size and location advantage of loop buffer. Nevertheless, on design complexity di...
SAC
2006
ACM
13 years 11 months ago
2006
ACM
Modern embedded processors access the Branch Target Buffer (BTB) every cycle to speculate branch target addresses. Such accesses, quite often, are unnecessary as there is no branc...
TPDS
1998
13 years 4 months ago
1998
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
MICRO
2000
IEEE
13 years 9 months ago
2000
IEEE
Dynamically Linked Libraries (DLLs) promote software modularity, portability, and flexibility and their use has become widespread. In this paper, we characterize the behavior of f...