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ISLPED
2006
ACM
70views Hardware» more  ISLPED 2006»
13 years 10 months ago
Sub-threshold design: the challenges of minimizing circuit energy
In this paper, we identify the key challenges that oppose subthreshold circuit design and describe fabricated chips that verify techniques for overcoming the challenges. Categorie...
Benton H. Calhoun, Alice Wang, Naveen Verma, Anant...
TCAD
2008
120views more  TCAD 2008»
13 years 4 months ago
Charge Recycling in Power-Gated CMOS Circuits
Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 1 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
SAC
2010
ACM
13 years 5 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
ECCC
2006
107views more  ECCC 2006»
13 years 4 months ago
Energy Complexity and Entropy of Threshold Circuits
Abstract. Circuits composed of threshold gates (McCulloch-Pitts neurons, or perceptrons) are simplified models of neural circuits with the advantage that they are theoretically mor...
Wolfgang Maass, Kei Uchizawa, Rodney J. Douglas