This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput ...
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...