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» Synthesis of Platform Architectures from OpenCL Programs
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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 3 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
CC
2007
Springer
13 years 9 months ago
Program Refactoring, Program Synthesis, and Model-Driven Development
Program refactoring, feature-based and aspect-oriented software synthesis, and model-driven development are disjoint research areas. However, they are all architectural metaprogram...
Don S. Batory
ERSA
2004
129views Hardware» more  ERSA 2004»
13 years 6 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
DAC
2012
ACM
11 years 7 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
ESTIMEDIA
2004
Springer
13 years 10 months ago
A queuing-theoretic performance model for context-flow system-on-chip platforms
Abstract—Few analytical performance models that relate performance figure of merit to architectural design decisions are reported in recent studies of network-on-chip, which pre...
Rami Beidas, Jianwen Zhu