85 search results - page 3 / 17 » Synthesizable High Level Hardware Descriptions |
DAC
1999
ACM
13 years 10 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
FCCM
2008
IEEE
14 years 7 days ago
2008
IEEE
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
FDL
2007
IEEE
14 years 3 days ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
AICCSA
2006
IEEE
13 years 12 months ago
2006
IEEE
: The past decade witnessed rapid development of constraint satisfaction technologies, where algorithms are now able to cope with larger and harder problems. However, owing to the ...
VLSID
2003
IEEE
14 years 6 months ago
2003
IEEE
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...