SoC Synthesis with Automatic Hardware Software Interface Generation

Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardware in order to meet the cost as well as the performance constraints. However, faster time to market requires automation of synthesis of these code segments of the application from high level specification such as C alongwith its interfaces. Such synthesis system should be able to generate hardware which is easily plug-gable in various types of architectures, as well as augment the application code to automatically take advantage of this new hardware component. In this paper, we address this problem and present an approach for complete SoC synthesis. We automatically generate synthesizable VHDL for the compute intensive part of the application alongwith necessary interfaces. Our approach is generic in the sense that it supports various processors and buses by keeping a generic hardware interface on one end and...

• Type: Conference
• Year: 2003
• Where: VLSID
• Authors: Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, Basant Kumar Dwivedi, M. Balakrishnan, Anshul Kumar
• Keywords: Complete Soc Synthesis, Compute Intensive Parts, Computer Architecture, Generic Hardware Interface, VLSID 2003