14 search results - page 1 / 3 » System Level Methodology for Programming CMP Based Multi-Thr... |
ISVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
ICCD
2007
IEEE
13 years 8 months ago
2007
IEEE
As application-specific instruction set processors (ASIPs) are being increasingly used in mobile embedded systems, the ubiquitous networking connections have exposed these systems...
NOCS
2007
IEEE
13 years 11 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
ASPLOS
2004
ACM
13 years 10 months ago
2004
ACM
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...