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CODES
1996
IEEE
13 years 10 months ago
A Model for the Coanalysis of Hardware and Software Architectures
Successful """tiprocessor system design for complex realtime embedded applications requires powerful and comprehensive. yet cost-effective. productive. and maintain...
Fred Rose, Todd Carpenter, Sanjaya Kumar, John Sha...
IESS
2007
Springer
143views Hardware» more  IESS 2007»
14 years 13 days ago
Embedded Software Development in a System-Level Design Flow
Abstract System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it add...
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlaue...
DAC
2006
ACM
14 years 8 days ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
FPL
2001
Springer
96views Hardware» more  FPL 2001»
13 years 10 months ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
DATE
2005
IEEE
100views Hardware» more  DATE 2005»
13 years 8 months ago
The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application
Developing a functional prototype of a system-on-chip provides a unifying vehicle for model validation and system refinement. Keeping the prototype executable everal abstraction l...
Alexandre Chureau, Yvon Savaria, El Mostapha Aboul...