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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 1 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
IPPS
2003
IEEE
13 years 10 months ago
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...
FPL
2004
Springer
83views Hardware» more  FPL 2004»
13 years 10 months ago
System-Level Modeling of Dynamically Reconfigurable Co-processors
Dynamically reconfigurable co-processors (DRCs) are interesting design alternatives when both flexibility and performance are concerns. However, it is difficult to study the perfor...
Yang Qu, Kari Tiensyrjä, Kostas Masselos
FDL
2004
IEEE
13 years 8 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...