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» System-Level Modeling of a Network Switch SoC
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ISSS
2002
IEEE
130views Hardware» more  ISSS 2002»
13 years 10 months ago
System-Level Modeling of a Network Switch SoC
We present the modeling of the high-level design of a next generation network switch from the perspective of a ComputerAided Design (CAD) team within the larger context of a desig...
Andrew S. Cassidy, Christopher P. Andrews, Donald ...
FDL
2004
IEEE
13 years 9 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
CSUR
2006
147views more  CSUR 2006»
13 years 5 months ago
A survey of research and practices of Network-on-chip
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
Tobias Bjerregaard, Shankar Mahadevan
MMB
2010
Springer
194views Communications» more  MMB 2010»
13 years 10 months ago
Searching for Tight Performance Bounds in Feed-Forward Networks
Abstract. Computing tight performance bounds in feed-forward networks under general assumptions about arrival and server models has turned out to be a challenging problem. Recently...
Andreas Kiefer, Nicos Gollan, Jens B. Schmitt
CCECE
2006
IEEE
13 years 11 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya