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» Techniques for Region-Based Register Allocation
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LCPC
2004
Springer
13 years 10 months ago
Speculative Subword Register Allocation in Embedded Processors
Abstract. Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is ass...
Bengu Li, Youtao Zhang, Rajiv Gupta
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
14 years 5 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
TVLSI
2002
102views more  TVLSI 2002»
13 years 5 months ago
Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique
Concurrent error detection (CED) based on time redundancy entails performing the normal computation and the re-computation at different times and then comparing their results. Time...
Ramesh Karri, Kaijie Wu
WCE
2007
13 years 6 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari
CGO
2006
IEEE
13 years 11 months ago
Tailoring Graph-coloring Register Allocation For Runtime Compilation
Just-in-time compilers are invoked during application execution and therefore need to ensure fast compilation times. Consequently, runtime compiler designers are averse to impleme...
Keith D. Cooper, Anshuman Dasgupta