106 search results - page 3 / 22 » Techniques for improving the accuracy of geometric-programmi... |
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
DAC
2003
ACM
13 years 11 months ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
ISQED
2005
IEEE
13 years 11 months ago
2005
IEEE
This paper proposes an efficient automation platform that provides fast and reliable path to analog circuit design for desired specifications. Circuit heuristics and hierarchy a...
DAC
2005
ACM
13 years 7 months ago
2005
ACM
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
ICCD
2007
IEEE
14 years 3 days ago
2007
IEEE
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...