8 search results - page 2 / 2 » Test Point Insertion: Scan Paths through Combinational Logic |
ITC
1997
IEEE
13 years 9 months ago
1997
IEEE
Testing embedded cores is a challenge because access to core I/Os is limited. The user-defined logic (ZJDL) surrounding the core may restrict the set of test vectors that can be a...
TVLSI
2002
13 years 4 months ago
2002
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...