83 search results - page 2 / 17 » Test point insertion based on path tracing |
VTS
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents an algorithm based on testability measurement for test point insertion of mixed-signal circuits. Two transfer function models compatible with analog models are...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
TCAD
1998
13 years 5 months ago
1998
—Conventional scan design imposes considerable area and delay overheads. To establish a scan chain in the test mode, multiplexers at the inputs of flip-flops and scan wires are...
JCP
2006
13 years 5 months ago
2006
Abstract-- In this paper a novel pulse sequence testing methodology is presented [22] as an alternative to Time Domain Reflectometry (TDR) for transmission line health condition mo...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
— In this paper, we present a two-pass error-resilience transcoding scheme based on content-aware intra-refresh (CAIR) for inserting error-resilience features to a compressed vid...