22 search results - page 2 / 5 » Test-Sequence Generation with Hol-TestGen with an Applicatio... |
VTS
1997
IEEE
13 years 10 months ago
1997
IEEE
Two fast algorithms for static test sequence compaction are proposed for sequential circuits. The algorithms are based on the observation that test sequences traverse through a sm...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
We propose a new approach to test generation and test compaction for scan circuits that eliminates the distinction between scan operations and application of primary input vectors...
ITC
1997
IEEE
13 years 10 months ago
1997
IEEE
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
CN
1999
13 years 5 months ago
1999
An optimization method is introduced for generating minimum-length test sequences taking into account timing constraints for FSM models of communication protocols. Due to active t...
DATE
2006
IEEE
13 years 12 months ago
2006
IEEE
Transparent-scan was proposed as an approach to test generation and test compaction for scan circuits. Its effectiveness was demonstrated earlier in reducing the test application ...