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» Testing and built-in self-test - A survey
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CORR
2011
Springer
151views Education» more  CORR 2011»
12 years 11 months ago
A Simulation Experiment on a Built-In Self Test Equipped with Pseudorandom Test Pattern Generator and Multi-Input Shift Register
This paper investigates the impact of the changes of the characteristic polynomials and initial loadings, on behaviour of aliasing errors of parallel signature analyzer (Multi-Inp...
A. Ahmad
DFT
2009
IEEE
178views VLSI» more  DFT 2009»
13 years 11 months ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud
CSREAESA
2009
13 years 5 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud
DATE
1999
IEEE
72views Hardware» more  DATE 1999»
13 years 9 months ago
On Programmable Memory Built-In Self Test Architectures
The design and architectures of a microcode-based memory BIST and programmable FSM-based memory BIST unit are presented. The proposed microcode-based memory BIST unit is more e ci...
Kamran Zarrineh, Shambhu J. Upadhyaya