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IPPS
2005
IEEE
13 years 11 months ago
Automatic Support for Irregular Computations in a High-Level Language
The problem of writing high performance parallel applications becomes even more challenging when irregular, sparse or adaptive methods are employed. In this paper we introduce com...
Jimmy Su, Katherine A. Yelick
ERSA
2006
147views Hardware» more  ERSA 2006»
13 years 6 months ago
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
Volodymyr V. Kindratenko
ICCS
2004
Springer
13 years 10 months ago
Evaluating the Performance of Skeleton-Based High Level Parallel Programs
We show in this paper how to evaluate the performance of skeleton-based high level parallel programs. Since many applications follow some commonly used algorithmic skeletons, we id...
Anne Benoit, Murray Cole, Stephen Gilmore, Jane Hi...
CASES
2001
ACM
13 years 9 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
13 years 9 months ago
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
Yazhuo Dong, Yong Dou