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HIPEAC
2009
Springer
13 years 12 months ago
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
Michael B. Henry, Leyla Nazhandali
ICS
2009
Tsinghua U.
13 years 12 months ago
Computer generation of fast fourier transforms for the cell broadband engine
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
Srinivas Chellappa, Franz Franchetti, Markus P&uum...
PVM
2010
Springer
13 years 3 months ago
Toward Performance Models of MPI Implementations for Understanding Application Scaling Issues
Abstract. Designing and tuning parallel applications with MPI, particularly at large scale, requires understanding the performance implications of different choices of algorithms ...
Torsten Hoefler, William Gropp, Rajeev Thakur, Jes...
ASAP
2009
IEEE
159views Hardware» more  ASAP 2009»
14 years 17 hour ago
A High-Performance Hardware Architecture for Spectral Hash Algorithm
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
Ray C. C. Cheung, Çetin K. Koç, John...
SC
1991
ACM
13 years 8 months ago
Performance results for two of the NAS parallel benchmarks
Two problems from the recently published “NAS Parallel Benchmarks” have been implemented on three advanced parallel computer systems. These two benchmarks are the following: (...
David H. Bailey, Paul O. Frederickson