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» The Design of High-Performance Microprocessors at Digital
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DSN
2004
IEEE
13 years 9 months ago
Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
Nicholas J. Wang, Justin Quek, Todd M. Rafacz, San...
PC
2007
161views Management» more  PC 2007»
13 years 4 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
DAC
2006
ACM
14 years 6 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan
TCAD
2008
112views more  TCAD 2008»
13 years 3 months ago
A High-Performance Droplet Routing Algorithm for Digital Microfluidic Biochips
In this paper, we propose a high-performance droplet router for a digital microfluidic biochip (DMFB) design. Due to recent advancements in the biomicroelectromechanical system and...
Minsik Cho, David Z. Pan