Sciweavers

175 search results - page 2 / 35
» The Filter Cache: An Energy Efficient Memory Structure
Sort
View
IWSOC
2003
IEEE
104views Hardware» more  IWSOC 2003»
13 years 10 months ago
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
13 years 8 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
SAC
2008
ACM
13 years 4 months ago
Filtering drowsy instruction cache to achieve better efficiency
Leakage power in cache memories represents a sizable fraction of total power consumption, and many techniques have been proposed to reduce it. As a matter of fact, during a fixed ...
Roberto Giorgi, Paolo Bennati
CASES
2008
ACM
13 years 7 months ago
Efficient code caching to improve performance and energy consumption for java applications
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
Yu Sun, Wei Zhang
GLVLSI
2010
IEEE
149views VLSI» more  GLVLSI 2010»
13 years 7 months ago
Lightweight runtime control flow analysis for adaptive loop caching
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
Marisha Rawlins, Ann Gordon-Ross