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ASPDAC
2008
ACM
89views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Load scheduling: Reducing pressure on distributed register files for free
In this paper we describe load scheduling, a novel method that balances load among register files by residual resources. Load scheduling can reduce register pressure for clustered...
Mei Wen, Nan Wu, Maolin Guan, Chunyuan Zhang
CC
2008
Springer
144views System Software» more  CC 2008»
13 years 7 months ago
Control Flow Emulation on Tiled SIMD Architectures
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
Ghulam Lashari, Ondrej Lhoták, Michael McCo...
CORR
2006
Springer
112views Education» more  CORR 2006»
13 years 5 months ago
Imagination as Holographic Processor for Text Animation
Vadim Astakhov, Tamara Astakhova, Brian Sanders
IEEEPACT
2008
IEEE
13 years 11 months ago
Exploiting loop-dependent stream reuse for stream processors
The memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory acc...
Xuejun Yang, Ying Zhang, Jingling Xue, Ian Rogers,...
ICDE
2004
IEEE
108views Database» more  ICDE 2004»
14 years 6 months ago
Using Stream Semantics for Continuous Queries in Media Stream Processors
In this demonstration paper we present a stream query processor capable of handling media (audio, video, motion ...) and feature streams. We show that due to their inherent semant...
Amarnath Gupta, Bin Liu, Pilho Kim, Ramesh Jain