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» The Midlifekicker Microarchitecture Evaluation Metric
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ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
13 years 11 months ago
The Midlifekicker Microarchitecture Evaluation Metric
We introduce the midlifekicker metric for evaluating microarchitectures mostly during the design process. We assume a microarchitecture designed at a time T-1 and estimate if a ne...
Stamatis Vassiliadis, Leonel Sousa, Georgi Gaydadj...
DAC
2012
ACM
11 years 7 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
MICRO
2003
IEEE
99views Hardware» more  MICRO 2003»
13 years 10 months ago
Power-driven Design of Router Microarchitectures in On-chip Networks
As demand for bandwidth increases in systems-on-a-chip and chip multiprocessors, networks are fast replacing buses and dedicated wires as the pervasive interconnect fabric for on-...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
IJHPCN
2008
94views more  IJHPCN 2008»
13 years 5 months ago
Analysing and improving clustering based sampling for microprocessor simulation
: We propose a set of statistical metrics for making a comprehensive, fair, and insightful evaluation of features, clustering algorithms, and distance measures in representative sa...
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kuri...
ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
13 years 11 months ago
Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture
In recent years, Globally Asynchronous Locally Synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever...
Grigorios Magklis, Pedro Chaparro, José Gon...