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» The New IEEE-754 Standard for Floating Point Arithmetic
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ASAP
2004
IEEE
140views Hardware» more  ASAP 2004»
13 years 9 months ago
Decimal Floating-Point Division Using Newton-Raphson Iteration
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
Liang-Kai Wang, Michael J. Schulte
ASAP
2005
IEEE
142views Hardware» more  ASAP 2005»
13 years 11 months ago
Decimal Floating-Point Square Root Using Newton-Raphson Iteration
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...
Liang-Kai Wang, Michael J. Schulte
ARITH
2007
IEEE
13 years 11 months ago
Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding
Shrinking feature sizes gives more headroom for designers to extend the functionality of microprocessors. The IEEE 754R working group has revised the IEEE 754-1985 Standard for Bi...
Liang-Kai Wang, Michael J. Schulte
ARITH
2003
IEEE
13 years 10 months ago
The Case for a Redundant Format in Floating Point Arithmetic
This work uses a partially redundant number system as an internal format for floating point arithmetic operations. The redundant number system enables carry free arithmetic opera...
Hossam A. H. Fahmy, Michael J. Flynn
ARITH
2001
IEEE
13 years 9 months ago
Worst Cases for Correct Rounding of the Elementary Functions in Double Precision
We give the results of our search for the worst cases for correct rounding of the major elementary functions in double precision floating-point arithmetic. These results allow the...
Vincent Lefèvre, Jean-Michel Muller