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DAC
1992
ACM
13 years 10 months ago
The Role of Long and Short Paths in Circuit Performance Optimization
Siu-Wing Cheng, Hsi-Chuan Chen, David Hung-Chang D...
DATE
1999
IEEE
127views Hardware» more  DATE 1999»
13 years 10 months ago
Minimizing Sensitivity to Delay Variations in High-Performance Synchronous Circuits
This paper investigates retiming and clock skew scheduling for improving the tolerance of synchronous circuits to delay variations. It is shown that when both long and short paths...
Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau
TCAD
2002
91views more  TCAD 2002»
13 years 5 months ago
Retiming and clock scheduling for digital circuit optimization
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
DAC
2007
ACM
14 years 6 months ago
An Efficient Mechanism for Performance Optimization of Variable-Latency Designs
In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...