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DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
13 years 11 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
DAGSTUHL
2006
13 years 6 months ago
Application of Kolmogorov complexity and universal codes to identity testing and nonparametric testing of serial independence fo
We show that Kolmogorov complexity and such its estimators as universal codes (or data compression methods) can be applied for hypothesis testing in a framework of classical mathe...
Boris Ryabko, Jaakko Astola, Alexander Gammerman
DATE
2002
IEEE
135views Hardware» more  DATE 2002»
13 years 10 months ago
Reducing Test Application Time Through Test Data Mutation Encoding
In this paper we propose a new compression algorithm geared to reduce the time needed to test scan-based designs. Our scheme compresses the test vector set by encoding the bits th...
Sherief Reda, Alex Orailoglu
IS
2007
13 years 5 months ago
Security Attack Testing (SAT) - testing the security of information systems at design time
For the last few years a considerable number of efforts have been devoted into integrating security issues into information systems development practices. This has led to a number...
Haralambos Mouratidis, Paolo Giorgini
ITC
2002
IEEE
72views Hardware» more  ITC 2002»
13 years 10 months ago
Test Point Insertion that Facilitates ATPG in Reducing Test Time and Data Volume
Efficient production testing is frequently hampered because current digital circuits require test sets which are too large. These test sets can be reduced significantly by means...
M. J. Geuzebroek, J. Th. van der Linden, A. J. van...