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INFOCOM
1992
IEEE
13 years 9 months ago
Topological Design of Interconnected LAN-MAN Networks
This paper describes a methodology for designing interconnected LAN-MAN networks with the objective of minimizing the average network delay. We consider IEEE 802.3-5 LANs intercon...
Cem Ersoy, Shivendra S. Panwar
DAC
2008
ACM
14 years 6 months ago
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
Aydin O. Balkan, Gang Qu, Uzi Vishkin
ISVLSI
2005
IEEE
80views VLSI» more  ISVLSI 2005»
13 years 10 months ago
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs
Mesh interconnect can be efficiently utilized while tree networks encourage the short routing distances. In this paper, we present the property analysis of a cluster-based interc...
Renqiu Huang, Ranga Vemuri
ICPP
1998
IEEE
13 years 9 months ago
The Postal Network: A Versatile Interconnection Topology
The postal network is an interconnection network that possesses many desirable properties which are important in network design and applications. It includes hypercubes and Fibona...
Jie Wu, Yuanyuan Yang