12 search results - page 1 / 3 » The impact of delay on the design of branch predictors |
MICRO
2000
IEEE
13 years 9 months ago
2000
IEEE
Modern microprocessors employ increasingly complicated branch predictors to achieve instruction fetch bandwidth that is sufficient for wide out-of-order execution cores. While ex...
MICRO
1994
IEEE
13 years 8 months ago
1994
IEEE
High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...
IEEEPACT
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper proposes a low-energy solution for CAMbased highly associative I-caches using a segmented wordline and a predictor-based instruction fetch mechanism. Not all instructio...
LCPC
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...