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DAC
2005
ACM
14 years 6 months ago
Device and architecture co-optimization for FPGA power reduction
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
ISW
2005
Springer
13 years 11 months ago
gore: Routing-Assisted Defense Against DDoS Attacks
Abstract. We present gore, a routing-assisted defense architecture against distributed denial of service (DDoS) attacks that provides guaranteed levels of access to a network under...
Stephen T. Chou, Angelos Stavrou, John Ioannidis, ...
IMC
2003
ACM
13 years 10 months ago
On inferring and characterizing internet routing policies
Border Gateway Protocol allows Autonomous Systems (ASs) to apply diverse routing policies for selecting routes and for propagating reachability information to other ASs. Although ...
Feng Wang, Lixin Gao
CODES
2004
IEEE
13 years 9 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan