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» Thermal modeling and analysis of 3D multi-processor chips
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DATE
2006
IEEE
126views Hardware» more  DATE 2006»
13 years 12 months ago
Analysis and modeling of power grid transmission lines
Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission ...
J. Balachandran, Steven Brebels, G. Carchon, T. We...
WWW
2005
ACM
14 years 6 months ago
A multi-threaded PIPELINED Web server architecture for SMP/SoC machines
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. D...
ICPIA
1992
13 years 10 months ago
Intelligent Pattern Recognition and Applications
:: This talk deals with fundamental aspects of Intelligent Pattern Recognition (IPR) and applications. It basically includes the following: Overview of 3D Biometric Technology and ...
Patrick Shen-Pei Wang
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
14 years 6 days ago
Modeling of NBTI-Induced PMOS Degradation under Arbitrary Dynamic Temperature Variation
Negative bias temperature instability (NBTI) is one of the primary limiters of reliability lifetime in nano-scale integrated circuits. NBTI manifests itself in a gradual increase ...
Bin Zhang, Michael Orshansky
ASAP
2011
IEEE
233views Hardware» more  ASAP 2011»
12 years 5 months ago
Accelerating vision and navigation applications on a customizable platform
—The domain of vision and navigation often includes applications for feature tracking as well as simultaneous localization and mapping (SLAM). As these problems require computati...
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco...