276 search results - page 4 / 56 » Thermal modeling and management of DRAM memory systems |
DAC
2002
ACM
14 years 6 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
DATE
2009
IEEE
14 years 16 days ago
2009
IEEE
Abstract—Convergence of communication, consumer applications and computing within mobile systems pushes memory requirements both in terms of size, bandwidth and power consumption...
MICRO
2010
IEEE
13 years 4 months ago
2010
IEEE
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
MICRO
2009
IEEE
14 years 12 days ago
2009
IEEE
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
CSREAESA
2003
13 years 7 months ago
2003
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...