195 search results - page 1 / 39 » Threaded Dynamic Memory Management in Many-Core Processors |
CISIS
2010
IEEE
13 years 11 months ago
2010
IEEE
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
PPL
2008
13 years 4 months ago
2008
This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for mult...
EUROPAR
2010
Springer
13 years 6 months ago
2010
Springer
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
EUROPAR
2010
Springer
13 years 6 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
HPDC
2008
IEEE
13 years 11 months ago
2008
IEEE
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...