93 search results - page 18 / 19 » Timing optimization of FPGA placements by logic replication |
FCCM
2002
IEEE
13 years 10 months ago
2002
IEEE
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
FPL
2010
Springer
13 years 3 months ago
2010
Springer
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
HEURISTICS
2002
13 years 5 months ago
2002
In this paper, we present the parallelization of tabu search on a network of workstations using PVM. Two parallelization strategies are integrated: functional decomposition strate...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...