115 search results - page 3 / 23 » Topological Design of Interconnected LAN-MAN Networks |
SBACPAD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
ITNG
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we present PRDT(2, 1), a new interconnection network topology for Network-on-chip (NoC) design. PRDT(2,1) features a recursive structure, and has small diameter and...
INFOCOM
1992
IEEE
13 years 9 months ago
1992
IEEE
This paper describes a methodology for designing interconnected LAN-MAN networks with the objective of minimizing the average network delay. We consider IEEE 802.3-5 LANs intercon...
TPDS
1998
13 years 5 months ago
1998
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
HOTI
2008
IEEE
13 years 11 months ago
2008
IEEE
The Network-on-Chip (NoC) paradigm has emerged as a promising solution for providing connectivity among the increasing number of cores that get integrated into both systems-onchip...