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ICCAD
1999
IEEE
97views Hardware» more  ICCAD 1999»
13 years 9 months ago
A methodology for correct-by-construction latency insensitive design
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...
NOCS
2008
IEEE
13 years 12 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
ICASSP
2011
IEEE
12 years 9 months ago
Performance analysis of optimal beamforming in MIMO dual-hop amplify-and-forward systems
This paper presents an analytical investigation on the performance of optimal beamforming scheme in multiple-input multiple-output dual-hop amplify-and-forward systems. We first ...
Caijun Zhong, Tharmalingam Ratnarajah, Shi Jin, Ma...
TCOM
2010
141views more  TCOM 2010»
13 years 6 days ago
Mutual Information Statistics and Beamforming Performance Analysis of Optimized LoS MIMO Systems
Abstract--This paper provides a systematic mutual information (MI) and multichannel beamforming (MBF) characterization of optimized multiple-input multiple-output (MIMO) communicat...
Michail Matthaiou, Paul de Kerret, George K. Karag...