Sciweavers

2 search results - page 1 / 1
» Towards verifying VHDL descriptions of processors
Sort
View
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
13 years 8 months ago
Towards verifying VHDL descriptions of processors
We present a system for the formal veri cation of processors which combines a computer algebra simpli cation tool with an object-oriented approach. It has been successfully used f...
Laurent Arditi, Hélène Collavizza
IPPS
1996
IEEE
13 years 9 months ago
A New Approach to Pipeline FFT Processor
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
Shousheng He, Mats Torkelson