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VLSID
2002
IEEE
159views VLSI» more  VLSID 2002»
14 years 5 months ago
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
Karanth Shankaranarayana, Soujanna Sarkar, R. Venk...
ECWEB
2004
Springer
179views ECommerce» more  ECWEB 2004»
13 years 11 months ago
Applying Text Mining on Electronic Messages for Competitive Intelligence
This paper presents how text -mining techniques can be used to analyze an enterprise’s external environment searching for competitors, related products and services, marketing st...
José Palazzo Moreira de Oliveira, Stanley L...
IPPS
2010
IEEE
13 years 3 months ago
Adapting cache partitioning algorithms to pseudo-LRU replacement policies
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
Kamil Kedzierski, Miquel Moretó, Francisco ...
TVLSI
2010
13 years 5 days ago
Improving Multi-Level NAND Flash Memory Storage Reliability Using Concatenated BCH-TCM Coding
By storing more than one bit in each memory cell, multi-level per cell (MLC) NAND flash memories are dominating global flash memory market due to their appealing storage density ad...
Shu Li, Tong Zhang