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» Transaction-Level Modeling for Sensor Networks Using SystemC
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SUTC
2010
IEEE
13 years 3 months ago
Transaction-Level Modeling for Sensor Networks Using SystemC
—As sensor networks are finding widespread use across many applications, designers increasingly must not only focus on application development, but also on sensor network optimiz...
Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan...
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
13 years 10 months ago
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
13 years 10 months ago
Systematic Transaction Level Modeling of Embedded Systems with SystemC
This paper gives an overview of a transaction level modeling (TLM) design flow for straightforward embedded system design with SystemC. The goal is to systematically develop both...
Wolfgang Klingauf
FPT
2005
IEEE
198views Hardware» more  FPT 2005»
13 years 10 months ago
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Wolfgang Klingauf, Robert Günzel
DATE
2003
IEEE
140views Hardware» more  DATE 2003»
13 years 10 months ago
Qualifying Precision of Abstract SystemC Models Using the SystemC Verification Standard
ng precision of abstract SystemC models using the SystemC Verification Standard Franco Carbognani1 , Christopher K. Lennard2 , C. Norris Ip3 , Allan Cochrane2 , Paul Bates2 1 Caden...
Franco Carbognani, Christopher K. Lennard, C. Norr...