1640 search results - page 1 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
ICCAD
2000
IEEE
13 years 9 months ago
2000
IEEE
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents a general method for computing transient sensitivities using both the direct and adjoint methods in event driven controlled explicit simulation algorithms that...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
RTCSA
1999
IEEE
13 years 8 months ago
1999
IEEE
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...