3 search results - page 1 / 1 » Two-level hierarchical register file organization for VLIW p... |
MICRO
2000
IEEE
13 years 5 months ago
2000
IEEE
High-performance microprocessors are currently designed to exploit the inherent instruction level parallelism (ILP) available in most applications. The techniques used in their de...
ICCD
2003
IEEE
14 years 2 months ago
2003
IEEE
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
HPCA
2000
IEEE
13 years 10 months ago
2000
IEEE
Processor architectures with tens to hundreds of arithmetic units are emerging to handle media processing applications. These applications, such as image coding, image synthesis, ...