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» Ultra low power digital signal processing
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VLSID
1996
IEEE
141views VLSI» more  VLSID 1996»
13 years 9 months ago
Ultra low power digital signal processing
Anantha Chandrakasan
VTC
2006
IEEE
134views Communications» more  VTC 2006»
13 years 10 months ago
Ultra Low-Power Digital Demodulators for Short Range Applications
— In this paper we present extremely flexible and low power digital binary ASK, PSK, and FSK demodulator architectures for short-range applications that uses limiter amplifier (i...
Mehmet R. Yuce, Ahmet Tekin
ISQED
2005
IEEE
99views Hardware» more  ISQED 2005»
13 years 10 months ago
Design Considerations for Low-Power Ultra Wideband Receivers
Abstract - This paper studies design considerations for lowpower ultra wideband (UWB) receiver architectures. First, three different architectures for the impulse-radio UWB transce...
Payam Heydari
ISLPED
2000
ACM
107views Hardware» more  ISLPED 2000»
13 years 9 months ago
Low power mixed analog-digital signal processing
The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and a...
Mattias Duppils, Christer Svensson
SOCC
2008
IEEE
151views Education» more  SOCC 2008»
13 years 11 months ago
Failure analysis for ultra low power nano-CMOS SRAM under process variations
— Several design metrics have been used in the past to evaluate the SRAM cell stability. However, most of them fail to provide the exact stability figures as shown in this paper...
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Sar...