Sciweavers

20 search results - page 2 / 4
» Understanding the impact of power loss on flash memory
Sort
View
MICRO
2009
IEEE
144views Hardware» more  MICRO 2009»
14 years 3 days ago
Characterizing flash memory: anomalies, observations, and applications
Despite flash memory’s promise, it suffers from many idiosyncrasies such as limited durability, data integrity problems, and asymmetry in operation granularity. As architects, ...
Laura M. Grupp, Adrian M. Caulfield, Joel Coburn, ...
ICPP
2003
IEEE
13 years 10 months ago
Performance and Power Impact of Issue-width in Chip-Multiprocessor Cores
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
Magnus Ekman, Per Stenström
SIGMETRICS
2005
ACM
156views Hardware» more  SIGMETRICS 2005»
13 years 11 months ago
Evaluating the impact of simultaneous multithreading on network servers using real hardware
This paper examines the performance of simultaneous multithreading (SMT) for network servers using actual hardware, multiple network server applications, and several workloads. Us...
Yaoping Ruan, Vivek S. Pai, Erich M. Nahum, John M...
SENSYS
2003
ACM
13 years 10 months ago
Understanding packet delivery performance in dense wireless sensor networks
Wireless sensor networks promise fine-grain monitoring in a wide variety of environments. Many of these environments (e.g., indoor environments or habitats) can be harsh for wire...
Jerry Zhao, Ramesh Govindan
DAC
2012
ACM
11 years 7 months ago
Run-time power-down strategies for real-time SDRAM memory controllers
Powering down SDRAMs at run-time reduces memory energy consumption significantly, but often at the cost of performance. If employed speculatively with real-time memory controller...
Karthik Chandrasekar 0001, Benny Akesson, Kees Goo...