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» Unification of partitioning, placement and floorplanning
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ICCAD
2004
IEEE
88views Hardware» more  ICCAD 2004»
14 years 1 months ago
Unification of partitioning, placement and floorplanning
Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, Dav...
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
13 years 10 months ago
Hierarchical Global Floorplacement Using Simulated Annealing and Network Flow Area Migration
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
Wonjoon Choi, Kia Bazargan
ISPD
2003
ACM
103views Hardware» more  ISPD 2003»
13 years 10 months ago
An integrated floorplanning with an efficient buffer planning algorithm
Previous works on buffer planning are mainly based on fixed die placement. It is necessary to reduce the complexity of computing the feasible buffer insertion sites to integrate t...
Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, ...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
13 years 8 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
13 years 9 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha