24 search results - page 5 / 5 » Unified adaptivity optimization of clock and logic signals |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
SIGMOD
2009
ACM
14 years 5 months ago
2009
ACM
Composite (or Complex) event processing (CEP) systems search sequences of incoming events for occurrences of userspecified event patterns. Recently, they have gained more attentio...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
DAC
2007
ACM
14 years 5 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...