174 search results - page 1 / 35 » Using Interaction Costs for Microarchitectural Bottleneck An... |
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
HICSS
2007
IEEE
13 years 11 months ago
2007
IEEE
— The purpose of this paper is to model the stochastic behavior of nodal prices and use the predicted price differences between zones as the basis for measuring the magnitude and...
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
EGH
2004
Springer
13 years 10 months ago
2004
Springer
In this paper we describe a multipurpose tool for analysis of the performance characteristics of computer graphics hardware and software. We are developing Qsilver, a highly con...
ICCD
2006
IEEE
14 years 2 months ago
2006
IEEE
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...