Sciweavers

16 search results - page 3 / 4
» Using TLM for Exploring Bus-based SoC Communication Architec...
Sort
View
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
13 years 11 months ago
Systematic Transaction Level Modeling of Embedded Systems with SystemC
This paper gives an overview of a transaction level modeling (TLM) design flow for straightforward embedded system design with SystemC. The goal is to systematically develop both...
Wolfgang Klingauf
DT
2006
180views more  DT 2006»
13 years 5 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...
DSD
2009
IEEE
124views Hardware» more  DSD 2009»
14 years 1 days ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
13 years 10 months ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
13 years 11 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel