36 search results - page 1 / 8 » Using a Victim Buffer in an Application-Specific Memory Hier... |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
HIPEAC
2009
Springer
13 years 8 months ago
2009
Springer
Abstract. This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide highthroughput communication for str...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
HPCA
1997
IEEE
13 years 9 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...