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» Using an FPGA for Fast Bit Accurate SoC Simulation
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CODES
2004
IEEE
13 years 9 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
FPGA
1999
ACM
139views FPGA» more  FPGA 1999»
13 years 10 months ago
Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
Yaska Sankar, Jonathan Rose
TC
2008
13 years 5 months ago
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron...
TECS
2008
119views more  TECS 2008»
13 years 5 months ago
Fast exploration of bus-based communication architectures at the CCATB abstraction
straction SUDEEP PASRICHA and NIKIL DUTT University of California, Irvine and MOHAMED BEN-ROMDHANE Newport Media Inc. Currently, system-on-chip (SoC) designs are becoming increasin...
Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane
DAC
2004
ACM
13 years 11 months ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...