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» VHDL extensions for complex transmission line simulation
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DATE
1997
IEEE
88views Hardware» more  DATE 1997»
13 years 9 months ago
VHDL extensions for complex transmission line simulation
This paper proposes extensions to the VHDL grammar and de nes new semantics in the language to model the timing behavior of high frequency buses and clock lines with multiple, dis...
Peter Walker, Sumit Ghosh
EURODAC
1994
IEEE
117views VHDL» more  EURODAC 1994»
13 years 9 months ago
Parallel algorithms for the simulation of lossy transmission lines
The simulation of lossy transmission lines in the time domain is a very time consuming task. It requires numerical convolutions and the solution of linear and nonlinear equation s...
W. Rissiek, O. Rethmeier, H. Holzheuer
EURODAC
1994
IEEE
124views VHDL» more  EURODAC 1994»
13 years 9 months ago
Automotive databus simulation using VHDL
developed and standardised, for example CAN[1][2], J1850[3]. THE ELECTRONIC VEHICLE TODAYVHDL has been used to develop a simulator for automotive databus networks. This is a design...
Karen Hale
ISCAS
2008
IEEE
94views Hardware» more  ISCAS 2008»
13 years 11 months ago
Transient simulation of on-chip transmission lines via exact pole extraction
— An accurate and efficient solution for the transient response at the far end of a transmission line is proposed in this paper. Unlike approximating the poles by truncating the...
Guoqing Chen, Eby G. Friedman
ICCD
2001
IEEE
154views Hardware» more  ICCD 2001»
14 years 1 months ago
Performance Optimization By Wire and Buffer Sizing Under The Transmission Line Model
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
Tai-Chen Chen, Song-Ra Pan, Yao-Wen Chang