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» VHDL-based communication and synchronization synthesis
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DAC
2000
ACM
14 years 5 months ago
Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima...
ACSD
2004
IEEE
160views Hardware» more  ACSD 2004»
13 years 8 months ago
Concurrency in Synchronous Systems
In this paper we introduce the notion of weak endochrony, which extends to a synchronous setting the classical theory of Mazurkiewicz traces. The notion is useful in the synthesis ...
Dumitru Potop-Butucaru, Benoît Caillaud, Alb...
DAC
2006
ACM
14 years 5 months ago
Synthesis of synchronous elastic architectures
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...
Jordi Cortadella, Michael Kishinevsky, Bill Grundm...
JSS
2010
120views more  JSS 2010»
12 years 11 months ago
Handling communications in process algebraic architectural description languages: Modeling, verification, and implementation
Architectural description languages are a useful tool for modeling complex systems at a high level of abstraction. If based on formal methods, they can also serve for enabling the...
Marco Bernardo, Edoardo Bontà, Alessandro A...
ACSD
2006
IEEE
109views Hardware» more  ACSD 2006»
13 years 6 months ago
Synthesis of Synchronous Interfaces
Reuse of IP blocks has been advocated as a means to conquer the complexity of today's system-on-chip (SoC) designs. Component integration and verification in such systems is ...
Purandar Bhaduri, S. Ramesh