15 search results - page 1 / 3 » VLIW: a case study of parallelism verification |
DAC
2005
ACM
13 years 6 months ago
2005
ACM
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
ENTCS
2008
13 years 4 months ago
2008
APCSAC
2003
IEEE
13 years 8 months ago
2003
IEEE
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
ISSS
1998
IEEE
13 years 8 months ago
1998
IEEE
This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programm...
EMSOFT
2007
Springer
13 years 8 months ago
2007
Springer
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...